Exemplary embodiments relate to a method of soft programming a semiconductor memory device and, more particularly, to an erase method using a soft program operation.
The erase operation of a semiconductor memory device is performed by supplying a high erase voltage to the well of a selected cell block. Here, the erase operation may be performed to lower the threshold voltages of selected memory cells so that they become lower than 0 V. In case of a single level cell (SLC) programmable with one level (that is, one threshold voltage level), when the threshold voltage of the memory cell is lower than 0 V, the memory cell is treated as an erased cell. When the threshold voltage of the memory cell reaches a target positive voltage, the memory cell is treated as a programmed cell. In case of a multi-level cell (MLC), the threshold voltage of an erased memory cell has an effect on a subsequent program operation because the memory cell is programmed with various levels.
FIG. 1 is a diagram illustrating features of a conventional erase operation.
Referring to FIG. 1, when the erase operation is performed in order to lower the threshold voltages of all the memory cells of a selected cell block so that the threshold voltages are lower than 0 V (12), the threshold voltage distribution of erased memory cells is wide. This is because the erase operation speed for all the memory cells of the selected cell block may not be substantially the same. For this reason, there is a great difference in the threshold voltage between memory cells having a relatively fast erase operation speed and memory cells having a relatively slow erase operation speed.
In order to reduce the difference in the threshold voltages, a soft program operation is performed after the erase operation. Here, the soft program operation is performed similar to a program operation but stopped if the threshold voltage of any one memory cell reaches a target level (that is, is equal to or greater than) at the time of a verify operation. Accordingly, there is a limit to a reduction in the distribution width W1 of the threshold voltages of memory cells having an erase state using the soft program operation.